ISBN 9788177589184,Verilog HDL: A Guide to Digital Design and Synthesis

Verilog HDL: A Guide to Digital Design and Synthesis

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Pearson

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ISBN 9788177589184
Publisher

Pearson

Publication Year 2008
ISBN-13

ISBN 9788177589184

ISBN-10 8177589180
Binding

Paperback

Edition 2nd
Number of Pages 492 Pages
Language (English)
Subject

Electronics & communications engineering

Samir Palnitkar’s Verilog HDL: A Guide to Digital Design and Synthesis, 2nd ed. 2nd Edition is a comprehensive book for  Electronics & Communication Engineering. The book comprises of latest versions of Verilog, extensive examples, illustrations and learning objectives and summaries of every chapter for students. In addition, the book is divided into multiple chapters for better understanding of electronics and communication engineering concepts. This book is can be used by 3rd semester engineering students.


About Samir Palnitkar


Samir Palnitkar is an Indian author and technology entrepreneur. He has authored books like Design Verification with E and Verilog Hdl. Palnitkar got his engineering degree from IIT Kanpur, Masters degree from the University of Washington and an MBA from  San Jose State University.

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